USB 2.0 Differential Trace DP/DM and Crystal Oscillator

USB 2.0 Differential Trace DP/DM

Place the USB PHY as close as possible to the USB 2.0 connector. The signal swing during high-speed operation on the DP/DM lines is relatively small (400 mV ± 10%), so any differential noise picked up on the twisted pair can affect the received signal. When the DP/DM traces do not have any shielding, the traces tend to behave like an antenna and picks up noise generated by the surrounding components in the environment. To minimize the effect of this behavior:

1. DP/DM traces should always be matched lengths and must be no more than 4 inches in length; otherwise, the eye opening may be degraded as shown below.
2. Route DP/DM traces close together for noise rejection on differential signals, parallel to each other and within two mils in length of each other (start the measurement at the chip package boundary, not to the balls or pins).
3. A high-speed USB connection is made through a shielded, twisted pair cable with a differential characteristic impedance of 90 W ±15%. In layout, the impedance of DP and DM should each be 45 W ± 10%.
4. DP/DM traces should not have any extra components to maintain signal integrity. For example, traces cannot be routed to two USB connectors.

DP/DM Vias

When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points on twisted pair lines; through-hole pins are not recommended.

Crystals / Oscillator

Keep the crystal and its load capacitors close to the USB PHY pins, XI and XO (see Figure 5). Note that frequencies from power sources or large capacitors can cause modulations within the clock and should not be placed near the crystal. In these instances, errors such as dropped packets occur. A placeholder for a resistor, in parallel with the crystal, can be incorporated in the design to assist oscillator startup.

Power is proportional to the current squared. The current is I = C*dv/dt, since dv/dt is a function of the PHY, current is proportional to the capacitive load. Cutting the load to decreases the current by and the power to 1/4 the original value.