SuperSpeed USB 3 Design Guide

Introduction

SuperSpeed USB (USB 3.0) delivering data rates up to 5Gbps which is ten times faster than Hi-Speed USB (USB 2.0) with optimized power efficiency. At these high transmission rates, signal integrity issues become increasingly restrictive on PCB trace and cable lengths, and on design implementation and features. Poor signal quality can significantly impact system performance and reliability.


SuperSpeed (USB 3.0) ReDriver in Source Application
Superspeed is a dual channel (TX± and RX±), single lane USB3.0 redriver which use in source application such as Notebooks, Desktops, Docking Station, Backplane and Cabling. Each channel offers selectable equalization setting to compensate the different input trace loss. The block diagram below shows the application on notebook with docking.

SuperSpeed USB Layout Guideline

A. Decoupling capacitor of VDD

It is recommended to put 0.1uF decoupling capacitor at each VDD pin of IC. Below is a layout reference of decoupling capacitor placement on a board. Four decoupling capacitors circled in pink below are located next to the four VDD pins (pins 6, 10, 16 and 20) of the IC.


B. PCB layers

Recommend to use at least four layers PCB for SuperSpeed USB design. Every data signal trace should be routed entirely over the ground plane on an adjacent layer.


C. Routing around the USB connector

On the host design, USB receptacle connector is used on the PCB. For the Vbus trace, it’s suggested to insert a ferrite bead. For the shielding of USB connector (shielding of USB cables), AC isolation to the ground (such as proper value of inductor, instead of connecting the cable shield directly to the PCB ground plane).

For the SuperSpeed signal trace, the impedance should be maintained. Avoiding any stubs and removing any routing that cause signal discontinuity and severe EMC noise issue. Also, do not put any metal between all SuperSpeed signal pair pins on every layer when using receptacles with pins stabbing the PCB.

Crosstalk between the signal trace
There are 3 pairs of signal (SSTX± /SSRX±/ D±) for USB3.0 and these signal pairs will cause three typical type near-end crosstalk:

• SSTX± to D± in RX mode
• SSTX± to SSRX±
• D± to SSRX± in TX mode

In order to minimize the crosstalk issue, the routing of the signal trace between SSTX±/ SSRX± and D± pairs should not be closed to each other.

SuperSpeed signal trace impedance

The layout around USB3.0 receptacle connector was routed as one or more large metal planes in specific layer (such as GND layer). In order to maintain the differential impedance of any SuperSpeed signal trace, make sure there is no metal between pins for any differential pair.

Stub on SuperSpeed trace

The pin on USB3.0 receptacle connector become an open stub if the SS signal trace pair is designed on the top layer which will cause the signal discontinuity issue.
D. Routing around the USB Controller

As high speed signal is sensitive to power signal, therefore the routing on power and ground design of USB controller need to be careful. Same as section (A), the decoupling cap is need for each power pin and it should be place as close as the power pad of USB controller. As USB controller contains both analog and digital section, analog power and digital power is required. In order to avoid the interference from the digital signal cause the malfunction on the analog circuit, the routing between analog power and digital signal trace should be placed as far as possible (including the signal trace). For the same voltage level’s analog power and digital power, a ferrite bead should be added in between for noise filtering.