RF Design Guidelines: PCB Layout and Circuit Optimization

The purpose of this document is to describe RF PCB design guidelines and circuit optimization
techniques to enable the designer to implement successful, right-first-time, PCB layouts and to ensure trouble free circuit optimization.

This application note describes step by step techniques for ensuring the correct PCB layout and
subsequent design optimization steps for each circuit block of the RF integrated circuit architecture.


4-Layer Designs



The advantages of 4-layer designs over 2-layer designs is that the former allows for distributed RF decoupling of a DC power plane sandwiched between two layers of predominantly ground plane, as illustrated below


Placing a distributed power plane between 2 ground plane layers enables an evenly distributed RF decoupling capacitance between the supply and ground. In addition, the power plane provides a very low impedance trace at radio frequencies.

The power plane should be surrounded by a ground trace or vias that connect the two ground traces together, thus preventing any radiated emissions at the board edge. From the above figure, the power plane is suppressed at the final stage of the TX matching network to prevent any parasitic coupling caused by radiated and reflected energy at this stage.

A 4 or multilayer PCB layout lends itself should an additional RF Power Amplifier be required (for example to take advantage of the transmit power allowances of FCC Part 15.247). Generally
speaking, the power supply of the PA will be the (unintentionally) noisiest PCB trace. A multi-layer approach allows for a separate low impedance power supply plane for the PA, while allowing for a continuous grounding strategy. Alternatively, separate ground and power supply layers that can be connected to common star points can be employed, although care should be taken to ensure that any return current paths are not routed under sensitive RF circuit blocks. While a common low-impedance ground plane offers a robust, practical solution, there is no generic “right solution” and the power supply and grounding philosophy employed will depend upon the application.

Another advantage of a 4-layer design is that for an overall PCB thickness of 1.6mm (0.063”), the gap between the PCB component and routing layer and the first ground plane layer allows for distributed Microstrip traces to be employed. Similarly for RF routing on the layer between the ground planes or well-decoupled power planes, Stripline techniques can be employed to ensure that traces have the required characteristic impedance (typically 50W).

2-Layer Designs

2-layer designs typically require a little more care with the PCB routing but can be successfully
implemented, as illustrated below.

Note that the power supply trace on the component is made quite thick so as to present as low as impedance trace as possible. Large areas of ground on this side of the board provide a low impedance path for decoupling.

Wherever possible the bottom (copper) side of the board should allow for a solid ground plane under the RF circuitry.

A 2-layer PCB will be cheaper to manufacture than a 4-layer PCB. However, to implement Microstrip or Stripline transmission lines the PCB thickness should not exceed 0.8mm - 1.00mm (0.031” - 0.039”), since the width of the transmission line trace will become rather large. PCBs of this thickness do not generally lend themselves to large sizes because of their fragility.

To overcome this problem with 2-layer designs, try and keep RF circuit traces as short as possible (< style="font-weight: bold;">Layout for VCO Tank and PLL Loop Filter

The external VCO tank circuit of the XE1200 series transceiver ICs consists of an external L (and in some instances a parallel capacitor) across a differential input. Hence the PCB layout should endeavor to respect the symmetry of this port.

PCB trace parasitics can influence circuit operation and act as unintentional radiators. To minimize radiation from the VCO circuit, keep the traces as short as possible.

Below, illustrates the symmetrical PCB layout of the XE1200 series VCO tank. Note that the
traces are kept as short as possible, and the entire circuit is enclosed within a ground or guard band. This ground trace both minimizes radiation from the VCO as well as preventing noise being injected directly into the VCO itself.

Note that the PCB trace allows for five possible combinations of components:

1. A single inductor on footprint #1
2. A single inductor on footprint #2
3. Two parallel inductors
4. An inductor on footprint #1 and a capacitor on footprint #2
5. A capacitor on footprint #1 and an inductor on footprint #2

To minimize the possibility of inductive cross coupling between the VCO and the transmitter and
receiver blocks, it is recommended that the VCO inductor be placed orthogonal to the transmitter load inductor and the LNA balun inductor.

Similarly, the PLL loop filter circuit is illustrated below. Again, the PCB trace is kept as short as possible and the loop filter components are partially encased with a guard band. Care should be taken in this area as any noise that is injected into the loop filter will introduce noise (primarily FM noise) in the VCO itself.