PCI Express requires no new technology. Generally desktop system boards are designed with 4-layer stackup, whereas server, workstation, and mobile system boards use 6-layer stackup or greater. Add-in cards may use either 4-layer or 6-layer stackup. ½ oz copper plated microstrip and 1 oz copper stripline are used.
An add-in card is required to have overall board thickness of 0.062 inches. A mobile platform can have a thickness of 0.062 inches or 0.050 inches.
To minimize loss and jitter, the most important considerations are to design to a target impedance and to keep tolerances small. Thicker dielectrics and wider traces will minimize loss. Microstrip differential traces produce greater impedance variation than stripline traces.
A signal pair should avoid discontinuities in the reference plane, such as splits and voids. When a signal changes layers, the ground stitching vias should be placed close to the signal vias. A minimum of 1 to 3 stitching vias per pair of signals is recommended. Never route a trace so that it straddles a plane split.
This blog presents the most common design issues affecting signal integrity in high-speed digital hardware design. These include impedance control, terminations, ground/power planes, signal routing and crosstalk. Armed with the knowledge presented here, a digital designer will be able to recognize potential signal integrity problems at the earliest design stage. Also, they will be able to apply techniques presented to prevent these issues affecting the performance of their design.
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