Capacitors should be placed as close as possible to the port and the power-carrying traces should be as wide as possible, preferably, a plane. There should also be double vias on power and ground nets and the trace lengths should be kept as short as possible. Standard bypass routing and design methods should be used at all times to minimize inductance and resistance between bypass bulk storage capacitors and the USB connectors.
VBUS Trace Width
The trace width for the VBUS current path from the VBUS source to the bypass bulk storage capacitor, over current protection device, and USB connector power and ground pins should be at least 0.050-in.-wide, with 1.5-oz. to 2-oz. copper on outer layer, to ensure adequate current carrying capability.
It is essential to make the power-carrying traces wide enough that the system over current protection will trip instead of fusing the board traces in an overload event. Depending on the rating of the over current protection device, a good “rule of thumb” is to ensure the power-carrying traces are wide enough to carry at least twice the amperage rating of the over current protection device.
Most motherboards use a long route for VBUS, as seen in Figure 4, that must be sufficiently wide in order to support the number of USB ports on the back panel. The power-handling capacity of a printed circuit trace depends mostly on its cross sectional area and the allowable temperature rise.
This blog presents the most common design issues affecting signal integrity in high-speed digital hardware design. These include impedance control, terminations, ground/power planes, signal routing and crosstalk. Armed with the knowledge presented here, a digital designer will be able to recognize potential signal integrity problems at the earliest design stage. Also, they will be able to apply techniques presented to prevent these issues affecting the performance of their design.
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