PCI Express requires AC coupling between transmitter and receiver. The AC coupling capacitors for both differential pair signals must be the same value, same package size, and have symmetric placement. If possible, TX traces should route on the top layer.
The capacitor value must be in the range of 75 nF to 200 nF (100 nF is best). The 0402 package size is preferred, and 0603 is acceptable. C-pack is not allowed.
The breakout into and out of capacitors should be symmetrical for both signal lines in a differential pair. The trace separation for routing to pads must be minimized in order to optimize tight coupling between the signal pairs.
This blog presents the most common design issues affecting signal integrity in high-speed digital hardware design. These include impedance control, terminations, ground/power planes, signal routing and crosstalk. Armed with the knowledge presented here, a digital designer will be able to recognize potential signal integrity problems at the earliest design stage. Also, they will be able to apply techniques presented to prevent these issues affecting the performance of their design.
Subscribe to:
Post Comments (Atom)
Really you have done great job,There are may person searching about that now they will find enough resources by your post.I like this blog ptrl hd
ReplyDelete