What's the same?
1. The pin connectivity has not changed between similar products.
2. The overall space required on a PCB has not changed.
3. The pitch between pins has not changed.
What needs to be changed?
The 6-pin WSON package has an exposed pad (maximum size of 2.35mm x 1.45mm) on the underside of the package. There is no exposed pad on the 6-pin SOT23 package.
The underside (and hence the exposed pad) of the 6-pin WSON will be closer to the PCB surface, which needs to be taken into consideration for the PCB layout and solder stencil design. The exposed pad must be either isolated or grounded (connect to VSS).
If the 6-pin WSON package is used on an existing 6-pin SOT23 footprint, the exposed pad can create a short circuit between two or more pads.
Picture below shows an example 6-pin SOT23 (in blue) and 6-pin WSON (in red) PCB footprints 'superimposed'. The dotted line represents the exposed bottom pad on the 6-pin WSON. The noted dimensions of 1.20mm and 1.90mm show example separation of the PCB pads for 6-pin SOT23 and 6-pin WSON respectively.
If an existing PCB that uses the 6-pin SOT23 package is to be used for the 6-pin WSON package, there must be no bare traces under the exposed pad. The PCB pads could remain the same size, but the solder mask under the component must be increased in size accordingly to prevent short circuits between two or more of the pads. The solder stencil aperture size must then be modified to match the change in pad size.
Due to the design of the 6-pin WSON package (as with similar bottomonly solder contact parts), the PCB pads should ideally be narrower than those of 6-pin SOT23 parts. Although not necessary, the PCB pads for the 6-pin WSON can be extended beyond the component body
to allow for component misplacement and to also assist in manual soldering or rework. In the example shown in Picture below, the pads extend beyond the 6-pin WSON body by 0.45mm.
Picture below shows a suggested compromise pad layout, modified from an existing SOT-23 design. The copper pads are not changed, but the solder mask is made to cover the entire center area as well as part of the pads to a width of 1.90mm; the solder paste stencil is modified to
prevent solder paste from being deposited on top of solder mask. While the layout of above picture is preferred, the below picture layout can be an acceptable compromise if it is not possible to make changes to the copper layer.
One potential problem with the above picture method is that moisture due to humidity can get trapped between the exposed center pad and the underlying copper pads, causing erratic sensing behavior. Also, the solder mask can potentially have pinholes in it which could cause short circuits to the center pad. It is therefore much better to reduce the pad lengths as shown in above picture, if at all possible.
IPC-7351, 'The Generic Requirement for Surface Mount Design and Land Pattern Standard' should be referred to during the design stage, as well as considering other design influences, such as the required PCB finish. The design should be verified prior to high volume manufacturing.
The solder reflow profile should not require changing when moving from 6-pin SOT23 to 6-pin WSON packages (JEDEC J-STD-020).
This blog presents the most common design issues affecting signal integrity in high-speed digital hardware design. These include impedance control, terminations, ground/power planes, signal routing and crosstalk. Armed with the knowledge presented here, a digital designer will be able to recognize potential signal integrity problems at the earliest design stage. Also, they will be able to apply techniques presented to prevent these issues affecting the performance of their design.
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