Considerations in Designing the Printed Circuit Boards of Embedded Switching Power Supplies

The importance of a good printed circuit board (PCB) layout in switching power supplies cannot e overstated. Developing the schematic and bdebugging the breadboard is a good start, but the final, critical challenge is to layout the PCB. Fortunately, understanding the phenomenon behind the operation of the typical switching power supply makes the effort much easier.

The primary rule for the designer is to be involved with every aspect of the design of the switching power supply, including the PCB. He or she is the only person who best understands the functional requirements of the power supply within the final product. In doing this, the power supply designer should never allow a PCB designer to use the auto-routing routines within the PCB layout program. The autorouter routine only strives to connect nodes that utilize the same signal as stated in the netlist. It disregards the length of the traces needed to accomplish this. The autorouter also considers all grounds the same signal and connects them together without consideration of the actual types of signals running through certain traces. For the power supply designer and the PCB designer to execute a good PCB layout, knowing the signals that flow between components is very important.

Appreciating the subtle “black magic” aspects to the PCB layout is essential to the success of the product. These layout factors can affect the performance of the switching power supply and can also affect the product’s ability to be released into the market. The aspects of the product’s operation that affect the printed circuit board design are: radiated electromagnetic interference (radiated EMI), conducted EMI, power supply stability, efficiency and operational longevity. The two forms of EMI are tested by regulatory approval bodies such as UL, IEC, and numerous other regulatory bodies throughout the world. The product must pass these stringent EMI tests before it can be sold into its respective market. The remaining factors affect the product's basic operation and customer satisfaction.



Current Loops

Switching power supplies have large current pulses with very sharp edges flowing within the power supply circuit. These large current pulses have the greatest effect on the creation of EMI, and should be the primary focus of the PCB designer. These currents flow in definable “loops” and the circuits carrying these currents should be laid-out first. The low-level control circuitry is then subsequently coupled into specific spots in the layout. These loops are diagrammed in picture below for the three major basic topologies of switching power supplies. All of the other topologies are variations of these three.

The loops shown in below can be listed in the order of their greatest affect on noise generation and operational performance:

1. The power switch high current loop.
2. The rectifier high current loop.
3. The input source loop.
4. The output load loop.

The input source and output load current loops are filtered by input and output EMI filters (not shown). Their currents are composed of largely DC current. The AC components of these currents are created by the power supply and should be kept to a minimum. These AC components are the elements that make-up conducted EMI. Any AC energy that is allowed to pass over a long enough length of a conductor, is radiated into the product’s environment.

The input and output loops are of secondary concern because the large AC pulses seen inside the supply are filtered by the input filter and output filter capacitors respectively. This makes their potential for creating high frequency noise problems less than the two AC loops. These loops should be analyzed later since they are directly measured by the regulatory agencies. The power switch and rectifier current loops are entirely AC, or more appropriately, pulsating DC. They ave trapezoidal current waveforms with high peak currents and very sharp edges (di/dt).

The Major Current Loops within Switching Power Supply Topologies

The power switch loop and the output rectifier loop(s) should be laid out so that the “loop” has a very small circumference and is composed of traces that are short in length and wide in width. First, the circumference of the loop controls the amount of RF energy that can be radiated at lower frequencies where a significant amount of conducted RF energy exists. By making the loop circumference as short as possible, one does not provide an efficient antenna for these lower noise frequencies. A typical power supply conducts noise frequency components that remain very high until about 100 times the switching frequency and then fall at a rate of between -20 to -40 dB per decade. The lower the frequency a loop is allowed to radiate, the more energy is allowed to escape into the environment. Secondly, the width of the traces used within the high current loops directly dictate the amount of voltage drop which will appear around the loop. This voltage drop, when created by high current, also creates RF radiation. The inductance and resistance exhibited by a trace is inversely proportional to its width. Inductance lowers the frequency response of a loop and therefore is a more efficient antenna at lower frequencies. So the loop traces should be as wide as possible. Wide traces also provide better heatsinking for the power switch and rectifier(s). An example of a layout for the power switch and rectifier loops in a buck converter is shown in below. Notice the very short distances between all members of the two main AC loops.




The output rectifier loop in transformer-isolated topologies have the same layout requirements as the input power switch loop. An example layout for the rectifier loop within a flyback converter can be seen below.


Paralleled Capacitors

Paralleling capacitors is a common technique for lowering the overall equivalent series resistance (ESR) and equivalent series inductance (ESL) of a filter capacitor. This allows the resulting filter capacitor to source or sink higher levels of ripple current with much less internal heating. Here, the PC board layout has a direct affect upon how much “sharing” occurs in the current and heating of the paralleled capacitors. The physical characteristics of the PCB layout between the other components in the loop and each capacitor must be as identical as possible. If the layout is not identical, the capacitor with the lower series trace impedance will see higher peak currents and become hotter (i2R). To promote this sharing, there should be a form of layout symmetry to both leads of the capacitors. Once again the traces between the components within the loop should be as short and wide as possible. Any parasitic impedance that is introduced by the layout effectively isolates the capacitor from the loop. This makes the high frequency current pulses seek other sources or sinks outside the loop. This creates more conducted EMI when the high current pulses are allowed to escape from the loop and enter the external circuitry. Examples of layouts for paralleled capacitors can be seen in below.



The grounds within a switching power supply are considered separately, even though they makeup one leg of the high current loops previously discussed. They are special in that they represent the lowest potential return path for the currents and the potential from which all other signals are measured. They have both DC and AC signals being conducted between various points in the physical ground system. There are sections of the ground system that should be considered separately from one another. If these grounds are interconnected improperly, the power supply can become unstable.